ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 288

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

24.13 Register Summary - EBI
24.14 Register Summary - EBI Chip Select
8077H–AVR–12/09
Address
Address
+0x00
+0x01
+0x02
+0x03
+0x0A
+0x0B
+0x0C
+0x0D
+0x0E
+0x1C
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0F
+0x10
+0x14
+0x18
Name
CTRLA
CTRLB
BASEADDRL
BASEADDRH
Name
CTRL
SDRAMCTRLA
Reserved
Reserved
REFRESHL
REFRESHH
INITDLYL
INITDLYH
SDRAMCTRLB
SDRAMCTRLC
Reserved
Reserved
CS0
CS1
CS2
CS3
Reserved
Reserved
Reserved
Reserved
(SRAM)
(SDRAM)
Bit 7
SDINITDONE
-
-
-
-
-
-
-
-
-
-
-
SDDATAW[1:0]
Bit 7
MRDLY[1:0]
RWDLY[1:0]
-
-
Chip Select Base Address Low Byte
Bit 6
-
-
-
-
-
-
-
-
-
-
-
Bit 6
-
-
Bit 5
-
-
-
-
-
-
-
-
-
-
Bit 5
LPCMODE[1:0]
-
-
ROWCYCDLY[[2:0]
SDRAM Initialization Time Low Byte
SDRAM Refresh Period Low Byte
ESRDLY[2:0]
Chip Select Base Address High Byte
Chip Select 0 Offset Address
Chip Select 1 Offset Address
Chip Select 2 Offset Address
Chip Select 3 Offset Address
Bit 4
ASIZE[4:0]
-
-
-
-
-
-
-
-
-
-
Bit 4
-
-
SDRAM Initialization Time High Byte
SDCAS
Bit 3
Bit 3
-
-
-
-
-
-
-
-
-
SRMODE[1:0]
-
-
-
SDROW
Bit 2
SDSREN
Bit 2
-
-
-
-
-
-
-
-
-
-
ROWCOLDLY[2:0]
RPDLY[2:0]
SDRAM Refresh Period High
SRWS[2:0]
Bit 1
Bit 1
-
-
-
-
-
-
-
-
-
IFMODE[1:0]
SDCOL[1:0]
SDMODE[1:0]
MODE[1:0]
XMEGA A
Bit 0
Bit 0
-
-
-
-
-
-
-
-
-
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