ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 385

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

30.12.3.11
30.13 Register Description
30.14 Register Summary
8077H–AVR–12/09
Write Fuse/ Lock Bit
Once this operation starts the PDIBUS between the PDI Controller and the NVM is disabled, and
the NVMEN bit in the PDI STATUS register is cleared until the operation is finished. Poll the
NVMEN bit until this is set again, indicting the PDIBUS is enabled.
The BUSY flag in the NVM STATUS register will be set until the operation is finished. The CRC
checksum will be available in the NVM DATA register.
The Write Fuse and Write Lock Bit command is used to write the fuses and the lock bits to a
more secure setting.
The BUSY flag in the NVM STATUS register will be set until the command is finished.
For lock bit write the LOCK BIT write command can also be used.
Refer to
the NVM Controller.
Refer to
ister description on the PDI.
Refer to
NVM Controller.
Refer to
1. Load the NVM CMD register with Flash CRC command.
2. Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
1. Load the NVM CMD register with the Write Fuse/ Lock Bit command.
2. Write the selected fuse or Lock Bits by doing a PDI Write operation.
during self-programming.
”Register Description - PDI Control and Status Register” on page 359
”Register Summary - NVM Controller” on page 46
”Register Summary” on page 361
”Register Summary - NVM Controller” on page 46
for complete register summary on the PDI.
for complete register summary on the
for complete register description on
XMEGA A
for complete reg-
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