ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 72

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8077H–AVR–12/09
Table 6-3.
Note:
Table 6-4.
T/C Event E
0
0
0
1
1
1
1
CHnMUX[7:4]
0001
0010
0010
0010
0011
0100
0101
0101
0110
0110
0111
0111
1000
1001
1010
1011
1100
1100
1101
1101
1110
1110
1111
1111
0
0
1
0
0
1
1
1. The description of how PORTS generate events are described in
0
1
X
0
1
0
1
CHnMUX[7:0] Bit Settings (Continued)
Timer/Counter Events
Group Configuration
TCxn_OVF
TCxn_ERR
TCxn_CCA
TCxn_CCA
TCxn_CCA
TCxn_CCA
CHnMUX[3:0]
X
X
X
X
X
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
0
1
M
X
X
X
X
X
X
X
E
E
E
E
E
E
E
E
n
n
n
n
n
n
n
n
X
X
X
X
X
X
X
Group Configuration
ADCA_CHn
ADCB_CHn
PORTA_PINn
PORTB_PINn
PORTC_PINn
PORTD_PINn
PORTE_PINn
PORTF_PINn
PRESCALER_M
See
See
See
See
See
See
See
See
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Table 6-4
Event Type
Over-/Underflow (x = C, D, E or F) (n= 0 or 1)
Error (x = C, D, E or F) (n= 0 or 1)
(Reserved)
Capture or Compare A (x = C, D, E or F) (n= 0 or 1)
Capture or Compare B (x = C, D, E or F) (n= 0 or 1)
Capture or Compare C (x = C, D, E or F) (n= 0 or 1)
Capture or Compare D (x = C, D, E or F) (n= 0 or 1)
(1)
(1)
(1)
(1)
(1)
(1)
Event Source
(Reserved)
ADCA Channel n (n =0, 1, 2 or 3)
ADCB Channel n (n=0, 1, 2 or 3)
(Reserved)
(Reserved)
(Reserved)
PORTA Pin n (n= 0, 1, 2 ... or 7)
PORTB Pin n (n= 0, 1, 2 ... or 7)
PORTC Pin n (n= 0, 1, 2 ... or 7)
PORTD Pin n (n= 0, 1, 2 ... or 7)
PORTE Pin n (n= 0, 1, 2 ... or 7)
PORTF Pin n (n= 0, 1, 2 ... or 7)
Clk
(Reserved)
(Reserved)
(Reserved)
Timer/Counter C0 event type E
Timer/Counter C1 event type E
Timer/Counter D0 event type E
Timer/Counter D1 event type E
Timer/Counter E0 event type E
Timer/Counter E1 event type E
Timer/Counter F0 event type E
Timer/Counter F1 event type E
PER
divide by M (M=1 to 32768)
”Port Event” on page
XMEGA A
136.
72