ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 372

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

30.11.2.7
30.11.2.8
30.11.2.9
8077H–AVR–12/09
Erase Application Section
Erase Application Section / Boot Loader Section Page
Application Section / Boot Loader Section Page Write
The BUSY flag in the NVM STATUS register will be set, and the CPU is halted during the execu-
tion of the command.
The CRC checksum will be available in the NVM DATA register.
In order to use the Flash Range CRC all the Boot Lock Bits must be unprogrammed (no locks).
The command execution will be aborted if the Boot Lock Bits for an accessed location are set.
The Erase Application command is used to erase the complete Application Section.
The BUSY flag in the STATUS register will be set until the operation is finished. The CPU will be
halted during the complete execution of the command.
The Erase Application Section Page Erase and Erase Boot Loader Section Page commands are
used to erase one page in the Application Section or Boot Loader Section.
The BUSY flag in the NVM STATUS register will be set until the erase operation is finished. The
FBUSY flag is set as long the Flash is Busy, and the Application section cannot be accessed.
The Write Application Section Page and Write Boot Loader Section Page commands are used to
write the Flash Page Buffer into one flash page in the Application Section or Boot Loader
Section.
The BUSY flag in the NVM STATUS register will be set until the write operation is finished. The
FBUSY flag is set as long the Flash is Busy, and the Application section cannot be accessed.
An invalid page address in the Z-pointer will abort the NVM command. The Erase Application
Section Page command requires that the Z-pointer addresses the Application section, and the
Erase Boot Section Page command requires that the Z-pointer addresses the Boot Loader
Section.
3. Load the end byte address in NVM Data Register (NVM DATA).
4. Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
1. Load the Z-pointer to point anywhere in the Application Section.
2. Load the NVM CMD register with the Erase Application Section command
3. Execute the SPM instruction. This requires the timed CCP sequence during self-
1. Load the Z-pointer with the flash page address to erase. The page address must be
2. Load the NVM CMD register with the Erase Application/Boot Section Page command.
3. Execute the SPM instruction. This requires the timed CCP sequence during self-
1. Load the Z-pointer with the flash page to write. The page address must be written to
2. Load the NVM CMD register with the Write Application Section/Boot Loader Section
3. Execute the SPM instruction. This requires the timed CCP sequence during self-
during self-programming.
programming.
written to ZPAGE. Other bits in the Z-pointer will be ignored during this operation.
programming.
PCPAGE. Other bits in the Z-pointer will be ignored during this operation.
Page command.
programming.
XMEGA A
372