r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 120

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
9.2.5
CM30 Bit (Wait control bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0000Ch
When the CM30 bit is set to 1 (MCU enters wait mode), the CPU clock stops (wait mode). Since the XIN clock
XCIN clock, and on-chip oscillator clock do not stop, the peripheral functions that use these clocks continue
operating. To set the CM30 bit to 1, set the I flag to 0 (maskable interrupt disabled).
A reset or a peripheral function interrupt is used to exit wait mode. When a peripheral function interrupt is used
to exit wait mode, the MCU resumes executing the instruction immediately after the instruction to set the CM30
bit to 1.
However, when using the WAIT mode to enter wait mode, set the I flag to 1 (maskable interrupt enabled). With
this setting, interrupt handling is performed by the CPU when the MCU exits wait mode.
Set the PRC0 bit in the PRCR register to 1 (write enabled) before setting the CM4 register.
Symbol
Bit
Symbol
CM40
CM41
CM42
CM45
System Clock Control Register 4 (CM4)
—
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
b7
—
0
CPU clock select bits
Reserved
High-speed clock set bit
Reserved
b6
—
0
Bit Name
CM45
b5
0
b4
—
0
Other than the above: Do not set.
Set to 0.
Set to 1 to operate the CPU using the clock at
16 MHz or more.
0: PCLK0_7 enabled
1: PCLK0_7 disabled (switching noise is reduced
Set to 0.
b2 b1 b0
0 0 0: XIN clock
0 0 1: fLOCO clock
0 1 0: Do not set.
0 1 1: XCIN clock
1 0 0: Do not set.
1 0 1: fHOCO-F clock
when switching PCLK0_7)
b3
—
0
CM42
b2
0
Function
CM41
b1
0
9. Clock Generation Circuit
CM40
b0
1
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