r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 331

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 17.12
17.3.3
Table 17.12
Note:
TRCIOA/TRCTRG
TRCIOA
TRCIOB
TRCIOC
TRCIOD
1. To use the port function, set the PMR bit of the corresponding pin to 0.
Unlike PWM mode, in PWM2 mode, a waveform is output from the TRCIOB pin at a compare match between
registers TRCGRB and TRCGRC. When the BUFEB bit in the TRCMR register is set to 1 (TRCGRD register
is used as a buffer register for TRCRGB register), the TRCGRD register functions as a buffer register for the
TRCGRB register. The output level is determined by the TOB bit in the TRCCR1 register.
When the TOB bit is 0 (output value is low), a low level is output at a compare match with the TRCGRB
register and a high level is output at a compare match with the TRCGRC register. When the TOB bit is 1 (output
value is high), a high level is output at a compare match with the TRCGRB register and a low level is output at
a compare match with the TRCGRC register.
Table 17.12 lists the Combinations of Pin Functions and General Registers for PWM2 Mode. Figure 17.12
shows the PWM2 Mode Block Diagram. Figure 17.13 shows the Timing of Buffer Operations for Registers
TRCGRD and TRCGRB in PWM2 Mode.
The value in the TRCGRD register is transferred to the TRCGRB register and the counter is cleared by a
compare match with the TRCGRA register. However, the counter is cleared only when the CCLR bit in the
TRCCR1 register is set to 1 (TRCCNT counter is cleared by input capture/compare match A). Also, when
trigger input is enabled by bits TCEG0 and TCEG1 in the TRCCR2 register in PWM2 mode, the value in the
TRCGRD register is transferred to the TRCGRB register and the counter is cleared by a trigger. The timer I/O
pins that are not used in PWM2 mode can be used only as I/O ports.
Pin Name
TRCIOB
PWM2 Mode
Preliminary document
Specifications in this document are tentative and subject to change.
Combinations of Pin Functions and General Registers for PWM2 Mode
PWM2 Mode Block Diagram
control
Output
control
I/O
I/O
I/O
Input
O
Port function
TRCGRB register
TRCGRC register
Port function
Compare match
Compare match
Compare Match Register
TRCCNT
register
(1)
(1)
Count clearing
/TRCTRG input
Comparator
Comparator
Comparator
Compare match
TRCGRD register
Trigger
TRCGRA
TRCGRB
TRCGRC
register
register
register
Buffer Register
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17. Timer RC
TRCGRD
register