r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 661

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
26.3.4
Notes:
FMR20 Bit (Erase-suspend enable bit)
FMR21 Bit (Erase-suspend request bit)
After Reset
1. To set this bit to 1, first write 0 and then 1 immediately. Disable interrupts and DTC activation between writing 0
2. To set the FMR21 bit to 0 (erase restart), set it when the FMR01 bit in the FMR0 register is 1 (CPU rewrite mode
3. Set the FMR27 bit to 1 after setting either of the following:
4. When the MCU exits wait mode or stop mode, if bits CM37 and CM36 (system clock select bits when exiting wait
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 00256h
and writing 1.
enabled).
• Set the CPU clock to the low-speed on-chip oscillator clock divided by 4, 8, or 16.
• Set the CPU clock to the XCIN clock divided by 1 (no division), 2, 4, or 8.
mode or stop mode) in the CM3 register are 10b (high-speed on-chip oscillator clock selected) or 11b (XIN clock
selected), or if the CM35 bit in the CM3 register is 1 (no division), this bit is set to the value after reset.
When the FMR20 bit is set to 1 (enabled), the erase-suspend function is enabled.
When the FMR21 bit is set to 1, erase-suspend mode is entered. If the FMR22 bit is 1 (erase-suspend request
enabled by interrupt request), the FMR21 bit is automatically set to 1 (erase-suspend request) when an interrupt
request for the enabled interrupt is generated, and erase-suspend mode is entered. To restart auto-erasure, set the
FMR21 bit to 0 (erase restart).
[Condition for setting to 0]
Set to 0 by a program.
[Conditions for setting to 1]
• When the FMR22 bit is 1 (erase-suspend request enabled by interrupt request) at the time an interrupt is
• Set to 1 by a program.
Symbol
generated.
Symbol
FMR20
FMR21
FMR22
FMR24
FMR27
Bit
Flash Memory Control Register 2 (FMR2)
—
—
—
FMR27
Preliminary document
Specifications in this document are tentative and subject to change.
b7
0
Erase-suspend enable bit
(1)
Erase-suspend request bit
(2)
Interrupt request suspend request enable bit
(1)
Reserved
(1, 4)
Reserved
Nothing is assigned. The write value must be 0. The read value is 0.
Low-current-consumption read mode enable bit
(1, 3, 4)
Flash memory wait cycle control bit
b6
—
0
Bit Name
b5
—
0
FMR24
b4
0
b3
—
0
0: Erase-suspend disabled
1: Erase-suspend enabled
0: Erase restart
1: Erase-suspend request
0: Erase-suspend request disabled by
1: Erase-suspend request enabled by
Set to 0.
0: Flash cycle
1: No flash cycle
Set to 0.
0: Low-current-consumption read mode
1: Low-current-consumption read mode
FMR22
interrupt request
interrupt request
disabled
enabled
b2
0
FMR21
b1
0
Function
FMR20
b0
0
26. Flash Memory
Page 630 of 725
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—