r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 492

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Notes:
21.2.6.2
After Reset
1. All SFRs except the shift register, bits SCLO and SDAO, and bits BC0 to BC3 in the SIMR1 register.
2. When rewriting the SDAO bit, write 0 to the SDAOP bit simultaneously using the MOV instruction.
3. For the data output after serial data transmission, the last bit value of the transmitted serial data is retained. If the
4. Enabled in master mode with the I
5. Disabled in clock synchronous serial mode.
6. When 0 is written to the ICE bit in the SICR1 register or 1 is written to the SIRST bit in the SICR2 register while
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 000E7h (SICR2_0)
content of the SDAO bit is rewritten before or after serial data transmission, the change is immediately reflected
in the data output until transmission starts. Do not write to the SDAO bit during transfer operation.
simultaneously using the MOV instruction. Execute the same way when a start condition is regenerated.
the I
register may be undefined. Refer to 21.5 Notes on Clock Synchronous Serial Interface . To reset the control
block in I
Mode . This can be used to prevent the values of bits BBSY and STOP from becoming undefined. When the
control block is reset in SSU bus interface mode and clock synchronous serial mode, set TE_NAKIE and
RE_STIE after the control block is reset.
Even if a start condition is generated by writing 0 to the SDAO bit, the state does not change the transfer
enabled state. Only generation of a start condition by writing 1 to the BBSY bit is enabled.
Since the SCL signal is held low, no stop condition can be generated by writing 1 to the SDAO bit. Generate a
stop condition by writing 0 to the BBSY bit.
Symbol
SDAOP SDAO write protect bit
Symbol
2
SIRST
SDAO
Bit
SCLO
BBSY
C bus function is operating, the values of the BBSY bit in the SICR2 register and the STOP bit in the SISR
SCP
—
—
2
C bus interface mode, follow 21.4.8 Procedure for Resetting Control Block in I
Preliminary document
Specifications in this document are tentative and subject to change.
I
BBSY
2
b7
C bus Function
0
Nothing is assigned. The write value must be 1. The read value is 1.
Control block reset bit
Nothing is assigned. The write value must be 1. The read value is 1.
SCL monitor flag
Serial data output value control bit
Start/stop condition generation
disable bit
Bus busy bit
SCP
b6
1
(4)
(4, 5, 6)
Bit Name
SDAO
b5
1
2
(2)
C bus function. When writing to the BBSY bit, write 0 to the SCP bit
SDAOP
b4
1
When hang-up occurs due to communication failure
during operation, writing 1 initializes the control
block without setting ports or resetting registers
0: SCL pin is set to low
1: SCL pin is set to high
When rewriting the SDAO bit, write 0 to this bit
simultaneously. The read value is 1.
When this bit is read, serial data output is
monitored:
0: Serial data output is set to low
1: Serial data output is set to high
When written:
0: Serial data output is set to low
1: Serial data output is set to high
When writing to the BBSY bit, write 0 to this bit
simultaneously. The read value is 1. Writing 1 has
no effect.
When read:
0: Bus is released (SDA signal changes from low to
1: Bus is occupied (SDA signal changes from high
When written:
0: Stop condition generated
1: Start condition generated
SCLO
high while SCL signal is held high)
to low while SCL signal is held high)
b3
1
b2
—
1
(2, 3)
21. Clock Synchronous Serial Interface
Function
SIRST
b1
0
b0
—
1
2
C bus Interface
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R/W
R/W
R/W
R/W
R/W
R/W
—
—
R