r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 291

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
16.4.4
In this mode, a one-shot pulse is output from the TRBO pin by a program, an external trigger (INT0 input), or
the rising edge of event input from the ELC after a specified period. An arbitrary period from the trigger is
counted.
To set a wait time after trigger input, set the count value in the TRBPR register in the 8-bit timer with 8-bit
prescaler.
In the 16-bit timer, the count value of the higher 8 bits is set in the TRBPR register and that of the lower 8 bits
is set in the TRBPRE register.
In the 8-bit timer with 8-bit prescaler, set the value of the pulse width in the TRBSC register. In the 16-bit timer,
set the value of the pulse width of the higher 8 bits in the TRBSC register and that of the lower 8 bits in the
TRBPRE register.
When 1 (one-shot count starts) is written to the TOSST bit in the TRBOCR register while the TCSTF bit in the
TRBCR register is 1 (count enabled), the count is started. If a valid trigger is input to the INT0 pin while the
TCSTF bit is 1, the count is started. The count is also started at the rising edge of event input from the ELC
while the TCSTF bit is 1. When the count value in the timer RB2 secondary reaches 00h and then it is reloaded,
the count is stopped. The count is also stopped by any of the following settings:
• When 1 (one-shot count stops) is written to the TOSSP bit in the TRBOCR register, the count is stopped.
• When 0 (count stops) is written to the TSTART bit in the TRBCR register, the count is stopped.
• When 1 (count is forcibly stopped) is written to the TSTOP bit in the TRBCR register, the count is stopped.
An interrupt request is generated when timer RB2 underflows during the secondary period.
When registers TRBPRE and TRBPR are read, each count value is read. When registers TRBPRE, TRBPR, and
TRBSC are written while the count is stopped, values are written to both the reload register and counter,
respectively. When these registers are written during a count operation, values are written to the reload register
and then transferred to the counter at the next reload operation.
For the setting of trigger by the INT0 input, refer to 16.7 INT0 Input Trigger Selection.
Figure 16.7 shows an Example of 8-Bit Timer with 8-Bit Prescaler Operation in Programmable Wait One-Shot
Generation Mode. Figure 16.8 shows an Example of 16-Bit Timer Operation in Programmable Wait One-Shot
Generation Mode.
Note:
1. After 1 is written to bits TOSST and TOSSP, a valid trigger is input to the INT0 pin, the rising edge for
Programmable Wait One-Shot Generation Mode
event input from the event link controller (ELC), or 0 is written to the TSTART bit, settings are reflected
in the counter operation after three cycles of the count source.
Monitor the TOSSTF bit in the TRBOCR register to confirm the operating state of the counter.
Preliminary document
Specifications in this document are tentative and subject to change.
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16. Timer RB2