r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 551

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
22.3.1
22.3.2
Notes:
After Reset
After Reset
1. After setting the LSTART bit, confirm that the RXDSF bit is set to 1 (RXD input disabled) before Synch Break
2. Before switching LIN operation modes, stop the LIN operation (LINE bit = 0) once.
3. Inputs to timer RJ and UART are disabled immediately after the LINE bit is set to 1 (LIN operation starts). Refer
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0008Ch (LINCR2_0)
Address 0008Eh (LINCT_0)
input starts.
to Figures 22.3 and 22.4 Header Field Transmission Flowchart Examples and Figures 22.6 to 22.8 Header
Field Reception Flowchart Examples .
Symbol
Symbol
LSTART Synch Break detection start bit
Symbol
Symbol
RXDSF RXD input status flag
Bit
Bit
BCIE
SFIE
SBIE
LINE
BCE
MST
SBE
LIN Special Function Register (LINCR2)
LIN Control Register (LINCT)
—
—
—
—
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
LINE
b7
b7
—
0
0
Bus collision detection during Sync
Break transmission enable bit
Nothing is assigned. The write value must be 0. The read value is 0.
Synch Field measurement-completed
interrupt enable bit
Synch Break detection interrupt
enable bit
Bus collision detection interrupt
enable bit
RXD input unmasking timing
select bit
(effective only in slave mode)
LIN operation mode set bit
LIN operation start bit
MST
b6
b6
—
0
0
Bit Name
Bit Name
SBE
b5
—
b5
0
0
(2)
LSTART
b4
b4
—
0
0
(1)
RXDSF
0: Bus collision detection disabled
1: Bus collision detection enabled
0: Synch Field measurement-completed interrupt
1: Synch Field measurement-completed interrupt
0: Synch Break detection interrupt disabled
1: Synch Break detection interrupt enabled
0: Bus collision detection interrupt disabled
1: Bus collision detection interrupt enabled
0: RXD input enabled
1: RXD input disabled
When this bit is set to 1, timer RJ input is enabled
and RXD input is disabled. The read value is 0
0: Unmasked after Synch Break detected
1: Unmasked after Synch Field measurement
0: Slave mode
1: Master mode (timer RJ output OR’ed with TXD)
0: LIN operation stops
1: LIN operation starts
b3
b3
—
0
0
disabled
enabled
completed
(Synch Break detection circuit operation)
BCIE
b2
b2
—
0
0
Function
Function
SBIE
(3)
b1
b1
—
0
0
SFIE
BCE
b0
b0
0
0
22. Hardware LIN
Page 520 of 725
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R