r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 653

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
26.3
Table 26.3
Note:
26.3.1
Notes:
Flash Memory Status Register
Flash Memory Control Register 0
Flash Memory Control Register 1
Flash Memory Control Register 2
Option Function Select Register
Table 26.3 lists the Flash Memory Register Configuration.
After Reset
1. The RDYSTI bit cannot be set to 1 (flash ready status interrupt requested) by a program.
2. The BSYAEI bit cannot be set to 1 (flash access error interrupt requested) by a program.
3. This bit is also set to 1 (error) when a command error occurs.
4. When this bit is 1, do not set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled).
5. To set this bit to 0, first read 1, then write 0.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
1. The OFS register is allocated in the flash memory, not in the SFRs. Set appropriate values as ROM data by a
Address 00252h
When writing 0 (no flash ready status interrupt requested) to the RDYSTI bit, read this bit (dummy read) before
writing to it. Make sure the DTC is not activated by the flash ready status source between reading and writing.
To confirm this bit, set the RDYSTIE bit in the FMR0 register to 1 (flash ready status interrupt enabled).
When writing 0 (no flash access error interrupt requested) to the BSYAEI bit, read this bit (dummy read) before
writing to it.
To confirm this bit, set the BSYAEIE bit in the FMR0 register to 1 (flash access error interrupt enabled) or set the
CMDERIE bit in the FMR0 register to 1 (erase/write error interrupt enabled).
Symbol
program.
Do not perform any additional writes to the OFS register. Erasing the block that includes the OFS register sets
the OFS register to FFh.
Registers
LBDATA LBDATA monitor flag
RDYSTI Flash ready status interrupt request flag
BSYAEI Flash access error interrupt request flag
Symbol
Bit
FST4
FST5
FST6
FST7
Flash Memory Status Register (FST)
—
Preliminary document
Specifications in this document are tentative and subject to change.
Flash Memory Register Configuration
FST7
Register Name
b7
1
(1, 4, 5)
(2, 4, 5)
Nothing is assigned. The write value must be 0. The read value is 0.
Program error flag
(3)
(3)
Erase error/blank check error flag
Erase-suspend status flag
Ready/busy status flag
FST6
b6
0
Bit Name
FST5
b5
0
FST4
b4
0
Symbol
FMR0
FMR1
FMR2
OFS
FST
b3
—
0: No flash ready status interrupt requested
1: Flash ready status interrupt requested
0: No flash access error interrupt requested
1: Flash access error interrupt requested
0: Locked
1: Not locked
0: No program error
1: Program error
0: No erase error/blank check error
1: Erase error/blank check error
0: Other than erase-suspend
1: During erase-suspend
0: Busy
1: Ready
0
10000X00b
After Reset
LBDATA
(Note 1)
00h
00h
00h
b2
X
BSYAEI
Function
b1
0
Address
0FFFFh
00252h
00254h
00255h
00256h
RDYSTI
b0
0
26. Flash Memory
Access Size
Page 622 of 725
8
8
8
8
8
R/W
R/W
R/W
—
R
R
R
R
R