r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 258

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
15.3.2
Notes:
TSTART Bit (Timer RJ count start bit)
TCSTF Bit (Timer RJ count status flag)
TEDGF Bit (Active edge judgement flag)
TUNDF Bit (Timer RJ underflow flag)
After Reset
1. For notes on using bits TSTART and TCSTF, refer to 15.5 Notes on Timer RJ (2) .
2. When 1 (count is forcibly stopped) is written to the TSTOP bit, bits TSTART and TCSTF are initialized at the
3. Set bits TEDGF and TUNDF to 1 and use the MOV instruction. If the read-modify-write instruction is executed to
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 00112h (TRJCR_0)
same time. The pulse output level is also initialized.
set the TRJCR register, bits TEDGF and TUNDF may be erroneously set to 0 depending on the timing.
Count operation is started by writing 1 to the TSTART bit and stopped by writing 0. When the TSTART bit is
set to 1 (count starts), the TCSTF bit is set to 1 (count in progress) in synchronization with the count source.
Also, after 0 is written to the TSTART bit, the TCSTF bit is set to 0 (count stops) in synchronization with the
count source. For details, refer to 15.5 Notes on Timer RJ (2).
[Conditions for setting to 0]
• When 0 is written to the TSTART bit (the TCSTF bit is set to 0 in synchronization with the count source).
• When 1 is written to the TSTOP bit.
[Condition for setting to 1]
• When 1 is written to the TSTART bit (the TCSTF bit is set to 1 in synchronization with the count source).
[Condition for setting to 0]
• When 0 is written to this bit by a program.
[Conditions for setting to 1]
• When the measurement of the active width of the external input (TRJIO) is completed in pulse width
• The set edge of the external input (TRJIO) is input in pulse period measurement mode.
[Condition for setting to 0]
• When 0 is written to this bit by a program.
[Condition for setting to 1]
• When the counter underflows.
Symbol
measurement mode.
TSTART Timer RJ count start bit
Symbol
TSTOP Timer RJ count forced stop bit
TEDGF Active edge judgement flag
TUNDF Timer RJ underflow flag
TCSTF
Bit
Timer RJ Control Register (TRJCR)
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
b7
—
0
(1)
(1)
Nothing is assigned. The write value must be 0. The read value is 0.
(3)
(3)
Nothing is assigned. The write value must be 0. The read value is 0.
Timer RJ count status flag
b6
—
0
Bit Name
TUNDF
b5
0
TEDGF
b4
(2)
0
0: Count stops
1: Count starts
0: Count stops
1: Count in progress
When 1 is written to this bit, count is forcibly
stopped. The read value is 0.
0: No active edge received
1: Active edge received
0: No underflow
1: Underflow
b3
—
0
TSTOP
b2
0
TCSTF
Function
b1
0
TSTART
b0
0
Page 227 of 725
15. Timer RJ
R/W
R/W
R/W
R/W
—
—
W
R