r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 137

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21368sdfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
10.2.3
Notes:
After Reset
1. When the MCU exits wait mode by a peripheral function interrupt, the CM30 bit is set to 0 (other than wait mode).
2. Set the CM35 bit to 0 in stop mode. When the MCU enters wait mode, if the CM35 bit is 1 (no division), the CM06
3. To enter wait mode or stop mode while the FMR27 bit in the FMR2 register is 1 (flash memory low-current-
4. When bits CM37 and CM36 are set to 10b (high-speed on-chip oscillator clock selected), the following will be set
5. When bits CM37 and CM36 are set to 11b (XIN clock selected), the following will be set when the MCU exits wait
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0000Bh
bit in the CM0 register is set to 0 (bits CM16 and CM17 enabled) and bits CM17 and CM16 in the CM1 register
are set to 00b (divide-by-1 mode).
consumption read mode enabled), set bits CM37 and CM36 to 00b (MCU exits using the CPU clock used
immediately before entering wait mode or stop mode) and set the CM35 bit to 0 (settings of CM06 bit in CM0
register and bits CM16b and CM17 in CM1 register enabled). During low-current-consumption read mode, do not
set the FMSTP bit in the FMR0 register to 1 (flash memory stops).
when the MCU exits wait mode or stop mode.
• Bits CM42 to CM40 in CM4 register = 001b (fLOCO clock)
• FRA00 bit in FRA0 register (high-speed on-chip oscillator on)
• Bits CM42 to CM40 in CM4 register = 101b (fHOCO-F clock)
mode or stop mode.
• OM05 bit in OM0 register = 1 (XIN clock oscillates)
• OM13 bit in OM1 register = 1 (XIN-XOUT pin)
• Bits CM42 to CM40 in CM4 register = 000b (XIN clock selected)
When entering wait mode while the CM05 bit in the CM0 register is 1 (XIN clock stops), if the XIN clock is
selected as the CPU clock used to exit wait mode, set the CM06 bit to 1 (divide-by-8 mode) and the CM35 bit to
0.
However, if an externally generated clock is used as the XIN clock, do not set bits CM37 and CM36 to 11b (XIN
clock selected).
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM3 register.
Symbol
Bit
Symbol
CM30
CM35
CM36
CM37
System Clock Control Register 3 (CM3)
Preliminary document
Specifications in this document are tentative and subject to change.
CM37
b7
0
Wait control bit
Nothing is assigned. The write value must be 0. The read value is 0.
CPU clock division ratio select bit when
exiting wait mode
System clock select bits when exiting
wait mode or stop mode
CM36
b6
0
Bit Name
(1)
CM35
(2)
b5
0
(3)
b4
0
b3
0
0: Not in wait mode
1: MCU enters wait mode
0: Settings of CM06 bit in CM0 register and bits
1: No division
b7 b6
0 0: MCU exits using the CPU clock used
0 1: Do not set.
1 0: High-speed on-chip oscillator clock
1 1: XIN clock selected
CM16 and CM17 in CM1 register are enabled
immediately before entering wait mode or
stop mode
selected
b2
0
(4)
Function
b1
0
(5)
CM30
b0
0
10. Power Control
Page 106 of 725
R/W
R/W
R/W
R/W
R/W

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