r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 321

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
17.2.14 Timer RC ELC Cooperation Control Register (TRCELCCR)
ELCOBE Bit (Input trigger select bit for pulse output forced cutoff)
ELCP2TE Bit (Input trigger select bit for PWM2 mode)
ELCICE Bit (TRCGRD input capture signal select bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0014Dh (TRCELCCR_0)
When the PTO bit in the TRCOER register is 1, forced cutoff due to INT0 input is enabled regardless of the set
value of the ELCOBE bit.
• When the ELCP2TE bit is 1
• When the ELCP2TE bit is 0
• When bits IOD3 and IOD2 in the TRCIOR1 register are 1 and the ELCICE bit is 1
• When the ELCICE bit is 0
Symbol
The rising edge of event input from the ELC is the input trigger in PWM2 mode, regardless of the settings of
bits TCEG0 and TCEG1 in the TRCCR2 register
TRCTRG input is the input trigger in PWM2 mode, according to the settings of bits TCEG0 and TCEG1 in
the TRCCR2 register
The rising edge of event input from the ELC is captured.
The active edge of the TRCIOD pin input is decided by the settings of the TRCIOR1 register.
ELCP2TE Input trigger select bit for
ELCOBE
Bit
ELCICE
Symbol
—
—
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
b7
—
0
Input trigger select bit for
pulse output forced cutoff
PWM2 mode
TRCGRD input capture signal
select bit
Nothing is assigned. The write value must be 0. The read value is 0.
b6
—
0
Bit Name
b5
—
0
b4
—
0: Event input from ELC is disabled
1: Bits EA, EB, EC, and ED in TOCORE register are set
0: TRCTRG pin input
1: Event input from ELC
0: TRCIOD pin input
1: Event input from ELC
0
by event input from ELC
b3
—
0
ELCICE
b2
Function
0
ELCP2TE ELCOBE
b1
0
b0
0
Page 290 of 725
17. Timer RC
R/W
R/W
R/W
R/W
—