r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 369

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number
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Part Number:
r5f21368sdfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
18.2.13 Timer RE2 Count Source Select Register (TRECSR)
TRECR register
RTCRST bit in
Bits CS0 to CS3 (Count source select bits)
Bits OS0 to OS2 (Timer RE2 output select bits)
After reset by
Bit
b0
b1
b2
b3
b4
b5
b6
b7
After Reset
Change these bits when the RUN bit in the TRECR register is 0 (count stops).
Change these bit when the RUN bit is 0 (count stops).
These bits are enabled when the TREOE bit in the TRECR register is 1 (TMRE2O output enabled).
When 111b is written to bits OS2 to OS0, the internal output level is set to low.
Address 00178h
Symbol AADJM
Symbol
AADJM Set to 0.
CS0
CS1
CS2
CS3
OS0
OS1
OS2
in Compare Match Timer Mode
Bit
Preliminary document
Specifications in this document are tentative and subject to change.
Timer RE2 output select bits
Count source select bits
b7
0
0
OS2
b6
X
0
Bit Name
OS1
b5
X
0
OS0
b4
0
X
Set the following values in compare match timer
mode (CS3 bit = 0):
Other than the above: Do not set.
b3 b2 b1 b0
b6 b5 b4
0 0 0 0: f8
0 0 0 1: f32
0 0 1 0: f128
0 0 1 1: f256
0 1 0 0: f512
0 1 0 1: f2048
0 1 1 0: f4096
0 1 1 1: f8192
0 0 0 : f4
0 0 1: fC1
0 1 0 : f8
0 1 1: Low level is fixed
1 0 0: f16
1 0 1: Low level is fixed
1 1 0: f32
1 1 1: Output toggled at every compare match
CS3
b3
X
1
CS2
b2
X
0
Function
CS1
b1
X
0
CS0
b0
X
0
Page 338 of 725
18. Timer RE2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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