r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 438

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
20.2.10 UART2 Special Mode Register 3 (U2SMR3)
Notes:
After Reset
1. Can only be set in I
2. Can only be set in SIO mode. In other modes, set to 0 (CLK2 pin is set to CMOS output).
3. When UART2 is not used, set the NODC bit to 0 (CLK2 pin is set to CMOS output).
4. Bits DL2 to DL0 are used to generate a delay in SDA2 output digitally in I
5. The amount of delay varies with the load on pins SCL2 and SDA2. When an external clock is used, the amount
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 000D5h
these bits to 000b (no delay).
of delay increases by about 100 ns.
Symbol
Symbol
NODC
Bit
CKPH
DL0
DL1
DL2
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
DL2
b7
0
Nothing is assigned. The write value must be 0. The read value is undefined.
Clock phase set bit
Nothing is assigned. The write value must be 0. The read value is undefined.
Clock output select bit
Nothing is assigned. The write value must be 0. The read value is undefined.
SDA2 digital delay setup bits
2
C mode. In other modes, set to 0 (no clock delay).
DL1
b6
0
Bit Name
DL0
b5
(1)
0
(2, 3)
(4, 5)
b4
—
0
NODC
0: No clock delay
1: With clock delay
0: CLK2 pin is set to CMOS output
1: CLK2 pin is set to N-channel open-drain output
b7 b6 b5
0 0 0: No delay
0 0 1: 1 or 2 cycle(s) of U2BRG count source
0 1 0: 2 or 3 cycles of U2BRG count source
0 1 1: 3 or 4 cycles of U2BRG count source
1 0 0: 4 or 5 cycles of U2BRG count source
1 0 1: 5 or 6 cycles of U2BRG count source
1 1 0: 6 or 7 cycles of U2BRG count source
1 1 1: 7 or 8 cycles of U2BRG count source
b3
0
b2
—
0
2
Function
CKPH
C mode. In other than I
b1
0
20. Serial Interface (UART2)
b0
—
0
Page 407 of 725
2
C mode, set
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—