r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 418

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 19.6
19.3.2.1
• When transfer data is 8 bits long (parity enabled, one stop bit)
• When transfer data is 9 bits long (parity disabled, two stop bits)
The above diagram applies for the following settings:
• STPS bit in U0MR register = 0 (one stop bit)
• PRYE bit in U0MR register = 1 (parity enabled)
• U0IRS bit in U0C1 register = 1 (transmission completed)
The above diagram applies for the following settings:
• STPS bit in U0MR register = 1 (two stop bits)
• PRYE bit in U0MR register = 0 (parity disabled)
• U0IRS bit in U0C1 register = 0 (transmit buffer empty)
Transfer clock
Transfer clock
U0C1 register
U0C1 register
U0C0 register
U0C1 register
U0C1 register
U0C0 register
U0IR register
U0IR register
TXEPT bit in
TXEPT bit in
U0TIF bit in
U0TIF bit in
TE bit in
TE bit in
Preliminary document
Specifications in this document are tentative and subject to change.
Operation Examples
Transmit Timing in Clock Asynchronous Serial I/O Mode
TI bit in
TI bit in
TXD
TXD
TC/2 + 1/fj
TC/2 + 1/fj
3/f1
Data is set in U0TB register
Data is set in U0TB register
Set to 0 when the DTC or the interrupt control circuit acknowledges an
interrupt from UART0 or set to 0 by a program
Start
Start
ST
ST
bit
bit
From U0TB register to UART0 transmit register
From U0TB register to UART0 transmit register
D0
D0
TC
TC
D1 D2 D3 D4 D5
D1 D2 D3 D4 D5 D6 D7 D8 SP SP
D6 D7
Set to 0 when the DTC or the interrupt control circuit acknowledges
an interrupt from UART0 or set to 0 by a program
Parity
bit
P
TC = 16 (n + 1)/fj or 16 (n + 1)/fEXT
TC = 16 (n + 1)/fj or 16 (n + 1)/fEXT
SP
Stop bit
3/f1
Stop
fj: Frequency of U0BRG count source (f1, f8, f32, or fC1)
fEXT: Frequency of U0BRG count source (external clock)
n: Value set in U0BRG register
fj: Frequency of U0BRG count source (f1, f8, f32, or fC1)
fEXT: Frequency of U0BRG count source (external clock)
n: Value set in U0BRG register
bit
ST
1/fj
D0
ST
D1
D0
Stopped because TE bit is 0
D2 D3 D4 D5 D6
D1
D2 D3 D4 D5 D6
D7 P
19. Serial Interface (UART0)
D7 D8 SP SP
1/fi
SP
ST
ST
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D0
D0