r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 193

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
13.2
Table 13.2
DTC Activation Control Register
DTC Activation Enable Register 0
DTC Activation Enable Register 1
DTC Activation Enable Register 2
DTC Activation Enable Register 3
DTC Activation Enable Register 5
DTC Activation Enable Register 6
DTC Control Register 0
DTC Block Size Register 0
DTC Transfer Count Register 0
DTC Transfer Count Reload Register 0
DTC Source Address Register 0
DTC Destination Address Register 0
DTC Control Register 1
DTC Block Size Register 1
DTC Transfer Count Register 1
DTC Transfer Count Reload Register 1
DTC Source Address Register 1
DTC Destination Address Register 1
DTC Control Register 2
DTC Block Size Register 2
DTC Transfer Count Register 2
DTC Transfer Count Reload Register 2
DTC Source Address Register 2
DTC Destination Address Register 2
DTC Control Register 3
DTC Block Size Register 3
DTC Transfer Count Register 3
DTC Transfer Count Reload Register 3
DTC Source Address Register 3
DTC Destination Address Register 3
DTC Control Register 4
DTC Block Size Register 4
DTC Transfer Count Register 4
DTC Transfer Count Reload Register 4
When the DTC is activated, control data (DTCCRj, DTBLSj, DTCCTj, DTRLDj, DTSARj, and DTDARj, j = 0 to
23) allocated in the SRAM control data area is read, and then transferred to the control registers (DTCCR, DTBLS,
DTCCT, DTRLD, DTSAR, and DTDAR) in the DTC. On completion of the DTC data transfer, the contents of the
DTC control registers are written back to the control data area.
The DTCCR, DTBLS, DTCCT, DTRLD, DTSAR, and DTDAR registers cannot be accessed directly.
DTCCRj, DTBLSj, DTCCTj, DTRLDj, DTSARj, and DTDARj can be directly accessed by the system bus.
Also, registers DTCTL and DTCENi (i = 0 to 3, 5, or 6) can be accessed via the peripheral bus.
Tables 13.2 to 13.5 list the DTC Register Configuration.
Registers
Preliminary document
Specifications in this document are tentative and subject to change.
DTC Register Configuration (1)
Register Name
DTCEN0
DTCEN1
DTCEN2
DTCEN3
DTCEN5
DTCEN6
DTCCR0
DTCCR1
DTCCR2
DTCCR3
DTCCR4
DTCCT0
DTSAR0
DTDAR0
DTCCT1
DTSAR1
DTDAR1
DTCCT2
DTRLD2
DTSAR2
DTDAR2
DTCCT3
DTSAR3
DTDAR3
DTCCT4
DTRLD4
DTBLS0
DTRLD0
DTBLS1
DTRLD1
DTBLS2
DTBLS3
DTRLD3
DTBLS4
Symbol
DTCTL
After Reset
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
00h
00h
00h
00h
00h
00h
00h
Address
06C4Ch
06C5Ch
0028Dh
06C4Ah
06C4Bh
06C4Eh
06C5Ah
06C5Bh
06C5Eh
0028Ah
0028Bh
0028Eh
06C40h
06C41h
06C42h
06C43h
06C44h
06C46h
06C48h
06C49h
06C50h
06C51h
06C52h
06C53h
06C54h
06C56h
06C58h
06C59h
06C60h
06C61h
06C62h
06C63h
00280h
00288h
00289h
Access Size
Page 162 of 725
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
13. DTC