r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 674

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 26.10
26.5.7.4
When 20h is written in the first bus cycle and then D0h is written in the second bus cycle to any address of the
block, auto-erasure (erase and erase verify operation) starts in the specified block.
The FST7 bit in the FST register can be used to confirm whether auto-erasure has completed. The FST7 bit is
set to 0 during auto-erasure and is set to 1 when auto-erasure completes. After auto-erasure completes, all data
in the block is set to FFh.
After auto-erasure has completed, the auto-erase result can be confirmed by the FST5 bit in the FST register
(refer to 26.5.8 Full Status Check).
The block erase command targeting each block in the program ROM can be disabled using the lock bit.
The following commands are not accepted under the following conditions:
• Block erase commands targeting data flash block A when the FMR14 bit in the FMR1 register is set to 1
• Block erase commands targeting data flash block B when the FMR15 bit is set to 1 (rewrite disabled).
• Block erase commands targeting data flash block C when the FMR16 bit is set to 1 (rewrite disabled).
• Block erase commands targeting data flash block D when the FMR17 bit is set to 1 (rewrite disabled).
Figure 26.10 shows a Block Erase Flowchart (Flash Ready Status Interrupt Disabled), Figure 26.11 shows a
Block Erase Flowchart (Flash Ready Status Interrupt Disabled and Suspend Enabled), and Figure 26.12 shows
a Block Erase Flowchart (Flash Ready Status Interrupt Enabled and Suspend Enabled).
In EW1 mode, do not execute this command to any block where the rewrite control program is allocated.
While the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled), a flash ready
status interrupt can be generated upon completion of auto-erasure. While the RDYSTIE bit is set to 1 and the
FMR20 bit in the FMR2 register is set to 1 (erase-suspend enabled), a flash ready status interrupt is generated
when the FMR21 bit is set to 1 (erase-suspend request) and auto-erasure suspends. The auto-erase result can be
confirmed by reading the FST register during the interrupt routine.
(rewrite disabled).
Preliminary document
Specifications in this document are tentative and subject to change.
Block Erase Command
Block Erase Flowchart (Flash Ready Status Interrupt Disabled)
Write D0h to any address
Write the command code
Block erase completed
Full status check
of the block
FST7 = 1?
Start
20h
Yes
No
FST7: Bit in FST register
26. Flash Memory
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