r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 672

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 26.8
26.5.7.3
The program command is used to write data to the flash memory in 1-byte units.
When 40h is written in the first bus cycle and data is written in the second bus cycle to the write address, auto-
programming (data program and verify operation) starts. Make sure the address value specified in the first bus
cycle is the same address as the write address specified in the second bus cycle.
The FST7 bit in the FST register can be used to confirm whether auto-programming has completed. The FST7
bit is set to 0 during auto-programming and is set to 1 when auto-programming completes.
After auto-programming has completed, the auto-program result can be confirmed by the FST4 bit in the FST
register (refer to 26.5.8 Full Status Check).
Do not write additions to the already programmed addresses.
The program command targeting each block in the program ROM can be disabled using the lock bit.
The following commands are not accepted under the following conditions:
• Program commands targeting data flash block A when the FMR14 bit in the FMR1 register is set to 1 (rewrite
• Program commands targeting data flash block B when the FMR15 bit is set to 1 (rewrite disabled).
• Program commands targeting data flash block C when the FMR16 bit is set to 1 (rewrite disabled).
• Program commands targeting data flash block D when the FMR17 bit is set to 1 (rewrite disabled).
Figure 26.8 shows a Program Flowchart (Flash Ready Status Interrupt Disabled) and Figure 26.9 shows a
Program Flowchart (Flash Ready Status Interrupt Enabled).
In EW1 mode, do not execute this command to any address where the rewrite control program is allocated.
When the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled), a flash ready
status interrupt can be generated upon completion of auto-programming. The auto-program result can be
confirmed by reading the FST register during the interrupt routine.
disabled).
Preliminary document
Specifications in this document are tentative and subject to change.
Program Command
Program Flowchart (Flash Ready Status Interrupt Disabled)
Write the command code
Write data to the write
Program completed
Full status check
FST7 = 1?
address
Start
40h
Yes
No
FST7: Bit in FST register
26. Flash Memory
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