r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 446

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
20.3.2
Table 20.7
Notes:
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2RXDF
1. Write 0 to bits that are not listed above when writing in clock asynchronous I/O mode.
2. The bits used for transmit/receive data are as follows:
3. When the transfer data length is 7 bits, the contents of bits b7 and b8 are 0. When the transfer data length is 8
Register
In UART mode, data is transmitted and received after setting the desired bit rate and transfer data format. Table
20.7 lists the Registers and Settings Used in UART Mode
Figure 20.7 shows a Transmit Timing Example in UART Mode and Figure 20.8 shows a Receive Timing
Example in UART Mode.
- Bits b0 to b6 when transfer data is 7 bits long
- Bits b0 to b7 when transfer data is 8 bits long
- Bits b0 to b8 when transfer data is 9 bits long
bits, the content of the b8 bit is 0.
Clock Asynchronous Serial I/O (UART) Mode
Preliminary document
Specifications in this document are tentative and subject to change.
Registers and Settings Used in UART Mode
b0 to b8
b0 to b8
OER, FER, PER, SUM
b0 to b7
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
IOPOL
CLK0, CLK1
CRS
TXEPT
CRD
NCH
UFORM
TE
TI
RE
RI
U2IRS
U2LCH
DF2EN
Bit
Set transmit data.
Receive data can be read.
Error flag
Set the bit rate.
Set to 100b when transfer data is 7 bits long.
Set to 101b when transfer data is 8 bits long.
Set to 110b when transfer data is 9 bits long.
Select an internal clock or external clock.
Select a stop bit.
Select whether parity is included and whether odd or even.
Select the TXD2 and RXD2 I/O polarity.
Select the U2BRG count source.
Select either the CTS or RTS function, if using.
Transmit register empty flag
Enable or disable the CTS or RTS function.
Select the output format of the TXD2 pin.
Select LSB first or MSB first when transfer data is 8 bits long.
Set to 0 when transfer data is 7 or 9 bits long.
Set to 1 to enable transmission.
Transmit buffer empty flag
Set to 1 to enable reception.
Reception complete flag
Select the UART2 transmit interrupt source.
Set to 1 to use inverted data logic.
Select the digital filter disabled or enabled.
(2)
(1)
.
(1)
(2, 3)
Function
20. Serial Interface (UART2)
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