r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 544

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 21.37
Software operation
SIRDR read access
dtc_dt2rdrfmask_p2
Receive data buffer
Transfer clock
stopped state
Transfer data
SISR register
Clearing Rdrf
RDRF bit in
Reception
(writing 0)
(SIRDR)
Preliminary document
Specifications in this document are tentative and subject to change.
DTC Related Operation Timing in Master Receive Mode
(1)
Notes:
Dummy read
1. In slave receive mode, there is no control on the RCVD bit.
2. If clearing of the RDRF bit is delayed, an overrun error occurs.
No overrun error will occur when the I
Read byte1
2
C bus function is used, so the SCL signal is held low and a hang-up occurs.
Read byte2
Mask RDRF
DTC
21. Clock Synchronous Serial Interface
(RCVD = Write 1)
Stop reception
CPU
(RDRF = Write 0)
Clear RDRF
(RCVD = Write 0)
Enable reception
(2)
Read byte3
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