r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 689

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
26.8.1.3
26.8.1.4
26.8.1.5
26.8.1.6
26.8.1.7
26.8.1.8
26.8.1.9
To set one of the following bits to 1, first write 0 and then 1 immediately. Disable interrupts and DTC activation
between writing 0 and writing 1.
• The FMR01 bit or FMR02 bit in the FMR0 register
• The FMR13 bit in the FMR1 register
• The FMR20 bit, FMR22 bit, or FMR 27 bit in the FMR2 register
To set one of the following bits to 0, first write 1 and then 0 immediately. Disable interrupts and DTC activation
between writing 1 and writing 0.
• The FMR14 bit, FMR15 bit, FMR16 bit, or FMR17 bit in the FMR1 register
In EW0 mode, if the supply voltage drops while rewriting any block in which a rewrite control program is
stored, it may not be possible to rewrite the flash memory because the rewrite control program cannot be
rewritten correctly. In this case, use standard serial I/O mode.
Do not write additions to the already programmed address.
Do not enter stop mode or wait mode during erase-suspend.
If the FST7 bit in the FST register is set to 0 (busy during programming or erasure execution), do not enter to
stop mode or wait mode.
Do not enter stop mode or wait mode while the FMR27 bit is 1 (low-current-consumption read mode enabled).
To perform programming and erasure, use VCC = 2.7 to 5.5 V as the supply voltage. Do not perform
programming and erasure at less than 2.7 V.
Do not execute the block blank check command during erase-suspend.
In low-speed clock mode and low-speed on-chip oscillator mode, the current consumption when reading the
flash memory can be reduced by setting the FMR27 bit in the FMR2 register to 1 (low-current-consumption
read mode enabled).
Low-current-consumption read mode can be used when the CPU clock is set to either of the following:
• The CPU clock is set to the low-speed on-chip oscillator clock divided by 4, 8, or 16.
• The CPU clock is set to the XCIN clock divided by 1 (no division), 2, 4, or 8.
However, do not use low-current-consumption read mode when the frequency of the selected CPU clock is
3 kHz or below. After setting the divide ratio of the CPU clock, set the FMR27 bit to 1 (low-current-
consumption read mode enabled).
To reduce the power consumption, refer to 10. Power Control.
Enter wait mode or stop mode after setting the FMR27 bit to 0 (low-current-consumption read mode disabled).
Do not enter wait mode or stop mode while the FMR27 bit is 1 (low-current-consumption read mode enabled).
How to Access
Preliminary document
Specifications in this document are tentative and subject to change.
Rewriting User ROM Area
Programming
Entering Stop Mode or Wait Mode
Programming and Erasure Voltage for Flash Memory
Block Blank Check
Low-Current-Consumption Read Mode
26. Flash Memory
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