r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 129

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number
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Quantity
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Part Number:
r5f21368sdfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
9.6.8
9.6.9
9.6.10
This clock is generated by dividing fLOCO or fHOCO-F by 128. When the FRA03 bit is set to 0, fLOCO
divided by 128 is selected. When this bit is set to 1, fHOCO-F divided by 128 is selected.
fOCO128 is configured as the capture signal used in the TRCGRA register for timer RC.
These clocks are used for timer RJ, timer RE2, and the serial interface.
Use theses clocks while the XCIN clock oscillation are stable.
This is an operating clock for the watchdog timer.
fLOCOWDT is generated by the low-speed on-chip oscillator for the watchdog timer and supplied by setting
the CSPRO bit in the CSPR register to 1 (count source protection mode enabled).
In count source protection mode for the watchdog timer, fLOCOWDT is not stopped.
fOCO128
fC1, fC2, and fC32
fLOCOWDT
Preliminary document
Specifications in this document are tentative and subject to change.
9. Clock Generation Circuit
Page 98 of 725

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