r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 206

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 13.8
13.3.4
Table 13.9
j =0 to 23
DTC block size register j
DTC transfer count register j
DTC transfer count reload register j DTRLDj
DTC source address register j
DTC destination address register j
X: 0 or 1
One to 256 bytes of data are transferred by one activation. The number of transfer times can be 1 to 256. When
the data transfer causing the DTCCTj (j = 0 to 23) register value to change to 0 is performed, an interrupt
request for the CPU is generated during DTC operation.
Table 13.9 shows Register Functions in Normal Mode.
Figure 13.8 shows Data Transfers in Normal Mode (j = 0 to 23).
DTCCR register
Bits b3 to b0 in
00X0b
01X0b
10X0b
11X0b
Normal Mode
Register
Preliminary document
Specifications in this document are tentative and subject to change.
Register Functions in Normal Mode
Data Transfers in Normal Mode (j = 0 to 23)
Transfer source
SRC
Source address
Incremented
Incremented
control
Fixed
Fixed
DTBLSj
DTCCTj
DTSARj
DTDARj
Destination address
Transfer
Symbol
Incremented
Incremented
control
Fixed
Fixed
Transfer destination
Size of the data block to be transferred by one activation
Number of times of data transfers
Not used
Data transfer source address
Data transfer destination address
DST
Source address
after transfer
SRC + N
SRC + N
SRC
SRC
Size of the data block to be transferred
by one activation (N bytes)
DTBLSj = N
DTSARj = SRC
DTDARj = DST
Function
Destination address
after transfer
DST + N
DST + N
DST
DST
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13. DTC