r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 744

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
29.16 Notes on Flash Memory
29.16.1 CPU Rewrite Mode
Table 29.2
FMR21, FMR22: Bits in FMR2 register
EW0
EW1
Mode
29.16.1.1 Prohibited Instructions
29.16.1.2 Interrupts
The following instructions cannot be used while the program ROM area is being rewritten in EW0 mode
because they reference data in the flash memory: UND, INTO, and BRK.
Tables 29.2 to 29.4 show CPU Rewrite Mode Interrupts.
Data
flash
Program
ROM
Data
flash
Program
ROM
Erase/
Target
Write
Preliminary document
Specifications in this document are tentative and subject to change.
CPU Rewrite Mode Interrupts (1)
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled or
FMR22 = 0)
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled)
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled or
FMR22 = 0)
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled or
FMR22 = 0)
During
auto-programming
Status
When an interrupt request is acknowledged, interrupt handling is executed.
If the FMR22 bit is set to 1 (erase-suspend request enabled by interrupt request), the
FMR21 bit is automatically set to 1 (erase-suspend request). The flash memory suspends
auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit is set to 0 (erase-suspend request
disabled by interrupt request), set the FMR21 bit to 1 during interrupt handling. The flash
memory suspends auto-erasure after td(SR-SUS).
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written. Auto-erasure can be restarted by setting the
FMR21 bit to 0 (erase restart).
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
Usable by allocating a vector in RAM.
When an interrupt request is acknowledged, interrupt handling is executed.
If the FMR22 bit is set to 1, the FMR21 bit is automatically set to 1. The flash memory
suspends auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit is set to 0, set the FMR21 bit to 1 during
interrupt handling. The flash memory suspends auto-erasure after td(SR-SUS).
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written. Auto-erasure can be restarted by setting the
FMR21 bit to 0.
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
Auto-erasure suspends after td(SR-SUS) and interrupt handling is executed. Auto-
erasure can be restarted by setting the FMR21 bit to 0 after interrupt handling completes.
While auto-erasure is being suspended, any block other than the block during auto-
erasure execution can be read or written.
Auto-erasure and auto-programming have priority and interrupt requests are put on
standby. Interrupt handling is executed after auto-erase and auto-program complete.
Maskable Interrupt
29. Usage Notes
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