r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 200

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
13.3
13.3.1
13.3.2
When the DTC is activated, control data
control data after data transfer is written back to the DTC control data area. Twenty-four sets of control data can
be stored in the DTC control data area, which allows 24 types of data transfers to be performed.
There are two transfer modes: normal mode and repeat mode. When the CHNE bit in the DTCCRj (j = 0 to 23)
register is set to 1 (chain transfers enabled), multiple control data is read and data transfers are continuously
performed by one activation source (chain transfers).
A transfer source address is specified by the 16-bit register DTSARj, and a transfer destination address is
specified by the 16-bit register DTDARj. The values in the registers DTSARj and DTDARj are separately fixed
or incremented according to the control data on completion of the data transfer.
Note:
The DTC is activated by an interrupt source. Figure 13.2 is a Block Diagram Showing Control of DTC
Activation Sources (i = 0 to 3, 5, or 6).
The interrupt sources to activate the DTC are selected with the DTCENi (i = 0 to 3, 5, or 6) registers.
The DTC sets 0 (activation disabled) to the corresponding bit among bits DTCENi0 to DTCENi7 in the
DTCENi register during operation when the setting of data transfer (the first transfer in chain transfers) is either
of the following:
• Transfer causing the DTCCTj (j = 0 to 23) register value to change to 0 in normal mode
• Transfer causing the DTCCTj register value to change to 0 while the RPTINT bit in the DTCCRj register is 1
If the data transfer setting is not either of the above, the DTC sets 0 to the interrupt source flag corresponding to
the activation source during operation.
If multiple activation sources are simultaneously generated, the DTC activation will be performed according to
the DTC activation source priority.
If multiple activation sources are simultaneously generated on completion of DTC operation, the next transfer
will be performed according to the priority.
DTC activation is not affected by the I flag or interrupt control register, unlike with interrupt request operation.
Therefore, even if interrupt requests cannot be acknowledged because interrupts are disabled, DTC activation
requests can be acknowledged. The IR bit in the interrupt control register does not change even when an
interrupt source to enable DTC activation is generated.
(interrupt generation enabled) in repeat mode
Operation
1. For details on control data, refer to 13.2.3 DTC Control Register j (DTCCRj) (j = 0 to 23) to 13.2.8
Overview
Activation Sources
DTC Destination Address Register j (DTDARj) (j = 0 to 23), and Table 13.7 Control Data
Allocation Addresses.
Preliminary document
Specifications in this document are tentative and subject to change.
(1)
is read from the DTC control data area to perform data transfers and
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13. DTC