r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 372

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
RTCF Bit (Real-time clock periodic interrupt flag)
ALIE Bit (Alarm interrupt enable bit)
TADJSF Bit (Correction status flag)
[Conditions for setting to 0]
• When 0 is written to this bit after reading it. If the result of reading this bit is 1, writing 0 to this bit will set it
• When an interrupt from the DTC is automatically cleared.
[Condition for setting to 1]
• When the interrupt source enabled by the TREIER register occurs.
Change this bits when the RUN bit in the TRECR register is 0 (count stops).
While the TADJSF bit is 1 (being corrected), do not change the following bits or register:
• The AADJE bit in the TRECR register
• The AADJM bit in the TRECSR register
• The TREADJ register
[Conditions for setting to 0]
• Correction ends.
(1) For addition correction, when the correction value set by bits ADJ0 to ADJ5 in the TREADJ register is
(2) For subtraction correction, when the correction value set by bits ADJ0 to ADJ5 and the internal counter
• When 00b (not corrected) is written to bits PLUS to MINUS in the TREADJ register.
[Conditions for setting to 1]
• Correction by software
(1) When 01b (subtraction correction) is written to bits PLUS to MINUS (the TADJSF bit is set to 1 in
(2) When 10b (addition correction) is written to bits PLUS to MINUS (the TADJSF bit is set to 1 in
• Automatic correction
to 0.
If the result of reading this bit is 0, writing 0 to this bit will not change its value. If this bit changes from 0 to 1
after the read, the bit will remain 1 even if 0 is written. Writing 1 has no effect.
When the BSY bit in the TRESEC register is set to 0 (data not being updated) during the seconds which meet
the conditions for subtraction correction.
transferred to the internal counter.
value are compared and match.
synchronization with the count source).
synchronization with the count source).
Preliminary document
Specifications in this document are tentative and subject to change.
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18. Timer RE2