r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 577

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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r5f21368sdfp#V0
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
23.3.3.2
23.3.3.3
23.3.3.4
This trigger is selected when bits ADCAP1 and ADCAP0 in the ADMOD register are set to 10b (timer RC).
To use this function, make sure the following conditions are met:
• Bits ADCAP1 and ADCAP0 in the ADMOD register are set to 10b (timer RC).
• Timer RC is used in the output compare function (timer mode, PWM mode, PWM2 mode).
• The ADTRGjE bit (j = A, B, C, D) in the TRCADCR register is set to 1 (A/D trigger occurs at compare match
• The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
When the IMFj bit in the TRCSR register is changed from 0 to 1, A/D conversion starts.
Refer to 17. Timer RC, 17.3.1 Timer Mode, 17.3.2 PWM Mode, and 17.3.3 PWM2 Mode for details on
timer RC and the output compare function (timer mode, PWM mode, and PWM2 mode).
When bits ADCAP1 and ADCAP0 in the ADMOD register are set to 11b (event input trigger from ELC), A/D
conversion can be started by event input from the ELC.
An example using INT0 as the A/D conversion start trigger is described below:
• Set bits ADCAP1 and ADCAP0 in the ADMOD register to 11b.
• Set the INT0EN bit in the INTEN register to 1 (INT0 input enabled), the INT0PL bit to 0 (one edge), and the
• Set the PD4_5 bit in the PD4 register to 0 (input mode).
• Select the INT0 digital filter using bits INT0F0 and INT0F1 in the INTF register.
• Set bits ELSEL3 to ELSEL0 in the ELSELR0 register to 0001b (A/D converter selected as link destination
• Set the ADST bit in the ADCON0 register to 1 (A/D conversion starts).
When the input to the INT0 pin changes from high to low, A/D conversion starts.
Allow one or more conversion cycles (when fAD =  AD, minimum 43 cycles) between A/D conversion start
trigger inputs.
with TRCGRj register).
POL bit in the INT0IC register to 0 (falling edge selected).
peripheral module)
Preliminary document
Specifications in this document are tentative and subject to change.
Trigger from Timer RC
Event Input Trigger from Event Link Controller (ELC)
Re-Inputting Triggers
23. A/D Converter
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