r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 128

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21368sdfp#V0
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
9.6
9.6.1
9.6.2
9.6.3
9.6.4
9.6.5
9.6.6
9.6.7
There are a CPU clock to operate the CPU and a peripheral function clock to operate the peripheral functions (refer
to Figure 9.1 Clock Generation Circuit Block Diagram).
This clock is used as the clock source for the CPU clock and the peripheral function clock. The XIN clock,
XCIN clock, or on-chip oscillator clock can be selected.
This is an operating clock for the CPU and the watchdog timer.
The CPU clock can be obtained by dividing the system clock by 1 (no division), 2, 4, 8, or 16. The frequency
division ratio can be selected by the CM06 bit in the CM0 register and bits CM16 and CM17 in the CM1
register.
After a reset, the low-speed on-chip oscillator clock with no division will be the CPU clock.
When entering stop mode, the CM06 bit is set to 1 (divide-by-8 mode). To enter stop mode, set the CM35 bit in
the CM3 register to 0 (settings of CM06 bit and bits CM16 and CM17 enabled).
These clocks are operating clocks for the peripheral functions.
fi (i = 1, 2, 4, 8, or 32) is obtained by dividing the system clock by i. fi is used for timer RJ, timer RB2, timer
RC, timer RE2, the serial interface, and the A/D converter.
When the MCU enters wait mode after the CM02 bit in the CM0 register are set to 1 (peripheral function clock
stops in wait mode), fi is stopped.
This clock is an operating clock for the peripheral functions.
This clock runs at the same frequency as the on-chip oscillator clock and can be used for timer RJ.
In wait mode, fOCO is not stopped.
This clock is used as the count source for timer RC.
fHOCO is generated by the high-speed on-chip oscillator and supplied by setting the FRA00 bit in the FRA0
register to 1.
In wait mode, fHOCO is not stopped.
This clock is used as the count source for timer RC and the A/D converter.
fHOCO-F is a clock generated by the high-speed on-chip oscillator and divided by i (i = 2, 3, 4, 5, 6, 7, 8, or 9;
division ratio selected by the FRA2 register), and it is supplied by setting the FRA00 bit to 1.
In wait mode, fHOCO-F is not stopped.
This clock is an operating clock for the voltage detecting circuit.
fLOCO is generated by the low-speed on-chip oscillator and supplied by setting the CM14 bit in the CM1
register o 0 (low-speed on-chip oscillator on).
In wait mode, fLOCO is not stopped.
CPU Clock and Peripheral Functional Clock
System Clock
CPU Clock
Peripheral Function Clocks (f1, f2, f4, f8, and f32)
fOCO
fHOCO
fHOCO-F
fLOCO
Preliminary document
Specifications in this document are tentative and subject to change.
9. Clock Generation Circuit
Page 97 of 725

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