r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 564

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r5f21368sdfp

Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
r5f21368sdfp#V0
Manufacturer:
Renesas Electronics America
Quantity:
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
23. A/D Converter
The A/D converter consists of one 10-bit successive approximation A/D converter circuit with a capacitive coupling
amplifier. The analog inputs, AN0 to AN11, share pins P0_0 to P0_7 and P1_0 to P1_3.
23.1
Table 23.1
Notes:
A/D conversion method
Analog input voltage
Operating clock  AD
Resolution
Absolute accuracy
Operating mode
Analog input pin
A/D conversion start condition
Conversion rate per pin
(  AD = fAD)
Table 23.1 lists the A/D Converter Performance. Figure 23.1 shows the A/D Converter Block Diagram.
1. When the analog input voltage exceeds the reference voltage, the A/D conversion result will be 3FFh in 10-bit
2. When 4.0 V  AVCC  5.5 V, the  AD frequency must be 20 MHz or below.
3. The conversion rate per pin is minimum 43  AD cycles for 8-bit and 10-bit resolution.
mode and FFh in 8-bit mode.
When 2.7 V  AVCC  4.0 V, the  AD frequency must be 10 MHz or below.
The  AD frequency must be 2 MHz or above.
Overview
Item
Preliminary document
Specifications in this document are tentative and subject to change.
A/D Converter Performance
(1)
(2)
(3)
0 V to AVCC
fAD, fAD divided by 2, fAD divided by 4, fAD divided by 8
(fAD = f1 or fHOCO-F)
AVCC = Vref = 5 V,  AD = 20 MHz
• 8-bit resolution
• 10-bit resolution
AVCC = Vref = 3.0 V,  AD = 10 MHz
Minimum 43  AD cycles
Successive approximation (with capacitive coupling amplifier)
8 bits or 10 bits selectable
• 8-bit resolution
• 10-bit resolution
One-shot mode, repeat mode 0, repeat mode 1, single sweep mode, and repeat
sweep mode
12 pins (AN0 to AN11)
• Software trigger
• Timer RC
• Event input trigger from event link controller (ELC)
(Refer to 23.3.3 A/D Conversion Start Condition )
±2 LSB
±3 LSB
±2 LSB
±5 LSB
Performance
23. A/D Converter
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