r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 746

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Table 29.4
FMR21, FMR22: Bits in FMR2 register
Note:
EW1
Mode
1. Do not use a non-maskable interrupt while block 0 is being auto-erased because the fixed vector is allocated in block 0.
Data
flash
Program
ROM
Erase/
Target
Write
Preliminary document
Specifications in this document are tentative and subject to change.
CPU Rewrite Mode Interrupts (3)
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled or
FMR22 = 0)
During
auto-programming
During auto-erasure
(suspend enabled)
During auto-erasure
(suspend disabled or
FMR22 = 0)
During
auto-programming
Status
• Watchdog Timer
• Oscillation Stop Detection
• Voltage Monitor 2
• Voltage Monitor 1
When an interrupt request is acknowledged, interrupt
handling is executed.
If the FMR22 bit is set to 1 (erase-suspend request
enabled by interrupt request), the FMR21 bit is
automatically set to 1 (erase-suspend request). The
flash memory suspends auto-erasure after td(SR-SUS).
If erase-suspend is required while the FMR22 bit is set
to 0 (erase-suspend request disabled by interrupt
request), set the FMR21 bit to 1 during interrupt
handling. The flash memory suspends auto-erasure
after td(SR-SUS).
While auto-erasure is being suspended, any block other
than the block during auto-erasure execution can be
read or written. Auto-erasure can be restarted by setting
the FMR21 bit is set to 0 (erase restart).
Interrupt handling is executed while auto-erasure or auto-programming is being
performed.
When an interrupt request is acknowledged, auto-
erasure or auto-programming is forcibly stopped
immediately and the flash memory is reset. Interrupt
handling starts when the flash memory restarts after the
fixed period.
Since the block during auto-erasure or the address
during auto-programming is forcibly stopped, the normal
value may not be read. After the flash memory restarts,
execute auto-erasure again and ensure it completes
normally.
The watchdog timer does not stop during the command
operation, so interrupt requests may be generated.
Initialize the watchdog timer regularly using the erase-
suspend function.
• Undefined Instruction
• INTO Instruction
• BRK Instruction
• Single Step
• Address Match
• Address Break
When an interrupt request is
acknowledged, interrupt
handling is executed.
If erase-suspend is required,
set the FMR21 bit to 1 during
interrupt handling. The flash
memory suspends auto-
erasure after td(SR-SUS).
While auto-erasure is being
suspended, any block other
than the block during auto-
erasure execution can be read
or written. Auto-erasure can be
restarted by setting the FMR21
bit in the FMR2 register is set
to 0 (erase restart).
Not usable during auto-erasure
or auto-programming.
29. Usage Notes
Page 715 of 725
(Note 1)