r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 512

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 21.12
Note:
(4)
(5)
(1)
(2)
(3)
(6)
1. To set the TEND bit to 0, write 0 after reading it as 1.
Preliminary document
Specifications in this document are tentative and subject to change.
Sample Flowchart for Data Transmission/Reception (Clock Synchronous
Communication Mode)
SISR register
SIER register
Write transmit data to SITDR register
Read receive data in SIRDR register
Read receive data in SIRDR register
Read TDRE bit in SISR register
Read RDRF bit in SISR register
Read TEND bit in SISR register
No
transmission
Initialization
TDRE = 1?
RDRF = 1?
TEND = 1?
continues?
Start
Data
End
TEND bit  0
RE_STIE bit  0
TE_NAKIE bit  0
Yes
Yes
No
Yes
No
No
Yes
(1)
(1) After confirming that the TDRE bit is 1 by reading
(2) Confirm that the RDRF bit is 1. If the RDRF bit is
(3) Determine whether data transmission continues.
(4) When the data transmission is completed, the
(5) Set the TEND bit to 0.
(6) Set bits RE_STIE and TE_NAKIE in the SIER
the SISR register, write the transmit data to the
SITDR register. When the transmit data is written
to the SITDR register, the TDRE bit is
automatically set to 0.
1, read the receive data in the SIRDR register.
When the SIRDR register is read, the RDRF bit is
automatically set to 0.
TEND bit in the SISR register is set to 1.
register to 0 to end transmit/receive mode.
21. Clock Synchronous Serial Interface
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