QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 11

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

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Datasheet
8.3
8.4
System Address Map ............................................................................................. 319
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
8.2.10 MMADR - Memory Mapped Range Address ............................................... 305
8.2.11 SVID2 - Subsystem Vendor Identification ................................................ 306
8.2.12 SID2 - Subsystem Identification ............................................................. 306
8.2.13 ROMADR - Video BIOS ROM Base Address ............................................... 307
8.2.14 CAPPOINT - Capabilities Pointer ............................................................. 307
8.2.15 MINGNT - Minimum Grant ..................................................................... 308
8.2.16 MAXLAT - Maximum Latency .................................................................. 308
8.2.17 MCAPPTR - Mirror of Dev0 Capability Pointer ............................................ 308
8.2.18 MGGC - Mirror of Dev0 (G)MCH Graphics Control ...................................... 309
8.2.19 MDEVENdev0F0 - Mirror of Dev0 DEVEN .................................................. 310
8.2.20 SSRW - Software Scratch Read Write ...................................................... 310
8.2.21 BSM - Base of Stolen Memory ................................................................ 311
8.2.22 PMCAPID - Power Management Capabilities ID ......................................... 311
8.2.23 PMCAP - Power Management Capabilities................................................. 312
8.2.24 PMCS - Power Management Control/Status .............................................. 313
8.2.25 SWSMI - Software SMI.......................................................................... 314
8.2.26 LBB - Legacy Backlight Brightness .......................................................... 315
8.2.27 ASLS - ASL Storage .............................................................................. 316
Device 2 – PCI I/O Registers............................................................................. 316
Device 2 I/O Configuration Registers.................................................................. 316
8.4.1
8.4.2
Legacy Address Range ..................................................................................... 321
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
Main Memory Address Range (1 MB to TOLUD).................................................... 325
9.2.1
9.2.2
9.2.3
PCI Memory Address Range (TOLUD – 4 GB)....................................................... 326
9.3.1
9.3.2
9.3.3
9.3.4
PCI Express Configuration Address Space ........................................................... 329
9.4.1
9.4.2
Graphics Memory Address Ranges ..................................................................... 330
9.5.1
9.5.2
System Management Mode (SMM) ..................................................................... 332
9.6.1
SMM Space Restrictions ................................................................................... 333
9.7.1
9.7.2
9.7.3
9.7.4
Memory Shadowing ......................................................................................... 334
I/O Address Space........................................................................................... 334
Index - MMIO Address Register .............................................................. 317
Data - MMIO Data Register .................................................................... 317
DOS Range (0h – 9_FFFFh) ................................................................... 322
Legacy Video Area (A_0000h-B_FFFFh) ................................................... 322
Expansion Area (C_0000h-D_FFFFh) ....................................................... 323
Extended System BIOS Area (E_0000h-E_FFFFh) ..................................... 324
System BIOS Area (F_0000h-F_FFFFh) ................................................... 324
Programmable Attribute Map (PAM) Memory Area Details .......................... 324
ISA Hole (15 MB–16 MB)....................................................................... 325
TSEG .................................................................................................. 326
Pre-allocated Memory ........................................................................... 326
APIC Configuration Space (FEC0_0000h-FECF_FFFFh) ............................... 328
HSEG (FEDA_0000h-FEDB_FFFFh) .......................................................... 328
FSB Interrupt Memory Space (FEE0_0000-FEEF_FFFF) .............................. 328
High BIOS Area.................................................................................... 328
PCI Express Graphics Attach .................................................................. 329
AGP DRAM Graphics Aperture ................................................................ 329
Graphics Register Ranges ...................................................................... 330
I/O Mapped Access to Device 2 MMIO Space ............................................ 330
SMM Space Definition ........................................................................... 332
SMM Space Combinations...................................................................... 333
SMM Control Combinations .................................................................... 333
SMM Space Decode and Transaction Handling .......................................... 334
CPU WB Transaction to an Enabled SMM Address Space............................. 334
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