QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 287
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 287 of 482
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Internal Graphics Device 2 Configuration Register (D2:F0-F1)
8.1.21
8.1.22
Datasheet
MAXLAT - Maximum Latency
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MCAPPTR - Mirror of Dev0 Capability Pointer
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
7:0
7:0
Bit
Bit
Access
Access
RO
RO
Default
Default
Value
Value
00h
48h
Maximum Latency Value:
The IGD has no specific requirements for how often it needs to
access the PCI bus.
Capabilities Pointer Value:
In this case the first capability is the product-specific Capability
Identifier (CAPID0).
0/2/0/PCI
3Fh
00h
RO
8 bits
0/2/0/PCI
44h
48h
RO
8 bits
Description
Description
287
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