QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 217
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
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Device 0 Memory Mapped I/O Register
6.7.7
Datasheet
EPVC1RCAP - EP VC 1 Resource Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:24
22:16
15:15
14:8
7:0
Bit
23
Access
R/WO
RO
RO
RO
RO
RO
Default
Value
10h
00h
00h
10h
0b
1b
Reserved
Reserved
Reserved
Reject Snoop Transactions (RSNPT):
TLP header are allowed on this VC.
header will be rejected as an Unsupported Request.
Reserved
Port Arbitration Capability (PAC):
Indicates types of Port Arbitration supported by this VC1 resource.
0: Transactions with or without the No Snoop bit set within the
1: Any transaction without the No Snoop bit set within the TLP
0/0/0/EPBAR
1C-1Fh
10008010h
R/WO; RO
32 bits
Description
217
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