QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 79

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Host Bridge Device 0 - Configuration Registers (D0:F0)
5
Warning:
5.1
Table 3.
Datasheet
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Class Code
Master Latency Timer
Header Type
Subsystem Vendor Identification
Subsystem Identification
Capabilities Pointer
Egress Port Base Address
(G)MCH Memory Mapped Register
Range Base
PCI Express* Register Range Base
Address
MCH-ICH Serial Interconnect
Ingress Root Complex
(G)MCH Graphics Control Register
(Device 0)
Device Enable
Reserved
Programmable Attribute Map 0
Programmable Attribute Map 1
Programmable Attribute Map 2
Register Name
Host Bridge Device 0 -
Configuration Registers (D0:F0)
Address locations that are not listed are considered Reserved registers locations. Reads
to Reserved registers may return non-zero values. Writes to reserved locations may
cause system failures.
Device 0 Configuration Registers
Device 0 Configuration Registers (Sheet 1 of 2)
VID
DID
PCICMD
PCISTS
RID
CC
MLT
HDR
SVID
SID
CAPPTR
EPBAR
MCHBAR
PCIEXBAR
DMIBAR
GGC
DEVEN
PAM0
PAM1
PAM2
Register
Symbol
60
0
2
4
6
8
9
D
E
2C
2E
34
40
44
48
4C
52
54
90
91
92
Register
Start
1
3
5
7
8
B
D
E
2D
2F
34
43
47
4B
4F
53
57
63
90
91
92
Register
End
8086h
27A0h
27ACh
0006h
0090h
00h
060000h
00h
00h
0000h
0000h
E0h
00000000h
00000000h
E0000000h
00000000h
0030h
0000001Bh
00h
00h
00h
Default
Value
1
2
RO
RO
R/W; RO
R/WC; RO
RO
RO
RO
RO
R/WO
R/WO
RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
Access
79