QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 187

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Device 0 Memory Mapped I/O Register
6.4.19
Datasheet
TSTTP0-2 - Thermal Sensor Temperature Trip Point
Register 0-2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register sets the target values for some of the trip points in the Thermometer
mode. See also TSTTP1.
31:31
30:16
3:3
2:2
1:1
0:0
Bit
Bit
Access
Access
R/WC
R/WC
R/WC
R/WC
R/WO
RO
Default
Default
Value
Value
0000h
0b
0b
0b
0b
0b
Hot Thermal Sensor Interrupt Event:
1 = Indicates that a Hot Thermal Sensor trip event occurred
based on a lower to higher temperature transition through the
trip point.
0 = No trip for this event, software must write a 1 to clear this
status bit.
Aux0 Thermal Sensor Interrupt Event:
based on a lower to higher temperature transition through the
trip point.
0 = No trip for this event, software must write a 1 to clear this
status bit.
Aux1 Thermal Sensor Interrupt Event:
1 = Indicates that an Aux1 Thermal Sensor trip event
occurred based on a lower to higher temperature transition
through the trip point.
0 = No trip for this event, software must write a 1 to clear this
status bit.
Reserved
Lock Bit for Aux0, Aux1 Trip Points:
This bit, when written to a 1, locks the Aux x trip point
settings.
This lock is reversible. The reversing procedure is: following
sequence must be done in order without any other
configuration cycles in-between
write 04C1C202 to TSTTP0-2
write 04C1C202 to TSTTP1-2
write 04C1C202 to TSTTP1-2
write 04C1C202 to TSTTP1-2
It is expected that the Aux x trip point settings can be
changed dynamically when this lock is not set.
Reserved
1 = Indicates that an Aux Thermal Sensor trip event occurred
0/0/0/MCHBAR
CEC-CEFh
00000000h
R/WO; R/W/L; RO
32 bits
(Sheet 2 of 2)
Description
Description
187