QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 144

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

6.2.36
6.2.37
6.2.38
144
C1DRC1 - Channel 1 DRAM Controller Mode 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRC1.
C1DRC2 - Channel 1 DRAM Controller Mode 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRC2.
C1AIT - Channel 1 Adaptive Idle Timer Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register controls Characteristics of Adaptive Idle Timer Mechanism.
0/0/0/MCHBAR
1A4-1A7h
00000000h
R/W; RO
32 bits
0/0/0/MCHBAR
1A8-1ABh
00000000h
R/W; RO
32 bits
0/0/0/MCHBAR
1B0-1B7h
0000000000000000h
R/W; RO
64 bits
Device 0 Memory Mapped I/O Register
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