QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 151

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Device 0 Memory Mapped I/O Register
6.2.47
6.2.48
6.2.49
6.2.50
Datasheet
WCC - Write Cache Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
MMARB0 - Main Memory Arbiter Control_0
B/D/F/Type:
Address Offset:
Default Value:
BIOS Optimal Default
Access:
Size:
MMARB1 - Main Memory Arbiter Control_1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
SBTEST - SB Test Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
8:3
2:2
1:0
Bit
Access
R/W
R/W
RO
Default
Value
00b
0b
0b
Reserved
Single-Channel Selector (SCS):
When in Single-channel mode, this is the populated channel.
0: Channel 0
1: Channel 1
DRAM Addressing Mode Control (DAMC):
00: Single-Channel
01: Dual-Channel Asymmetric (Stacked)
10: Dual-Channel Interleaved
11: Reserved
0/0/0/MCHBAR
218-21Bh
A4000000h
R/W; RO
32 bits
0/0/0/MCHBAR
220-223h
00000264h
0h
R/W; RO
32 bits
0/0/0/MCHBAR
224-227h
00000000h
R/W; RO
32 bits
0/0/0/MCHBAR
230-233h
34020000h
R/W; RO
32 bits
(Sheet 2 of 2)
Description
151