QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 281

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
Internal Graphics Device 2 Configuration Register (D2:F0-F1)
8.1.10
Datasheet
MMADR - Memory Mapped Range Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register requests allocation for the IGD registers and instruction ports. The
allocation is for 512 KB and the base address is defined by bits [31:19].
31:19
18:4
2:1
Bit
3
0
Access
R/W
RO
RO
RO
RO
Default
0000h
0000h
Value
00b
0b
0b
Memory Base Address: Set by the OS, these bits correspond to
address signals [31:19].
Address Mask: Hardwired to 0’s to indicate 512-KB address
range.
Prefetchable Memory: Hardwired to 0 to prevent prefetching.
Memory Type: Hardwired to 0’s to indicate 32-bit address.
Memory / IO Space: Hardwired to 0 to indicate memory space.
0/2/0/PCI
10-13h
00000000h
R/W; RO
32 bits
Description
281

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