QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 382

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

10.5.4.4.9
10.5.5
10.6
10.6.1
10.6.2
10.6.2.1
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Control Bus
The SDVO port defines a two-wire communication path between the SDVO device(s)
and (G)MCH. Traffic destined for the PROM or DDC will travel across the Control bus,
and will then require the SDVO device to act as a switch and direct traffic from the
Control bus to the appropriate receiver. Additionally, the Control bus is able to operate
at up to 1 MHz.
Multiple Display Configurations
Since the (G)MCH has several display ports available for its two pipes, it can support up
to two different images on different display devices. Timings and resolutions for these
two images may be different. The (G)MCH is incapable of operating in parallel with an
external PCI Express graphics device. The (G)MCH can, however, work in conjunction
with a PCI graphics adapter.
Power Management
Overview
ACPI States Supported
The Mobile Intel 945GM/GME/PM/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipset family supports the following ACPI states:
System
G1/S1
G1/S2
G1/S3-Cold
G1/S3-Hot
G1/S4
G2/S5
G3
• ACPI 1.0b and 2.0 Compliant
• ACPI S0, S3, S4, S5
• CPU States C0, C1, C2, C3, C4 states
• Internal Graphics Display Device States: D0, D1, D3
• Graphics Display Adapter States: D0, D3.
• PCI Express Link States: L0, L0s, L1, L2, L3
• HSLPCPU# output
• Dual Frequency Graphics Technology
• Dynamic I/O power reductions
G0/S0
Suspend to RAM (STR). All voltage supplies except the CPU Core and FSB VTT
left enabled
Not supported.
Not supported.
Suspend to RAM (STR). Context saved to memory.
Suspend to Disk (STD). All power lost (except wakeup on ICH)
Soft off. All power lost (except wakeup on ICH). Total reboot.
Mechanical off. All power (AC and battery) removed from system.
Full On
Functional Description
Datasheet