QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 219
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 219 of 482
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Device 0 Memory Mapped I/O Register
6.7.9
6.7.10
6.7.11
Datasheet
EPVC1RSTS - EP VC 1 Resource Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Reports the Virtual Channel specific status.
EPVC1MTS - EP VC 1 Maximum Number of Time Slots
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The fields in this register reflects the maximum number of time slots supported by the
(G)MCH for various configurations.
EPVC1IST - EP VC 1 Isoch Slot Time
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register reflects the number of common host clocks per time slot.
15:2
Bit
1
0
Access
RO
RO
RO
Default
Value
0000h
0b
0b
Reserved
VC1 Negotiation Pending (VC1NP):
(initialization or disabling).
Before using a Virtual Channel, software must check whether
the VC Negotiation Pending fields for that Virtual Channel are
cleared in both Components on a link.
Reserved
0: The VC negotiation is complete.
1: The VC resource is still in the process of negotiation
0/0/0/EPBAR
26-27h
0000h
RO
16 bits
0/0/0/EPBAR
28-2Bh
04050609h
R/W
32 bits
0/0/0/EPBAR
38-3Fh
0000000000000000h
R/W
64 bits
Description
219
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