QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 278
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
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8.1.5
278
RID2 - Revision Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number for Device 2 Functions 0 and 1
2:0
7:0
Bit
Bit
4
3
Access
Access
R/WC
RO
RO
RO
Default
Default
Value
Value
00h
000b
1b
0b
Revision Identification Number (RID):
This is an 8-bit value that indicates the revision identification
number for the (G)MCH.
Capability List (CLIST):
This bit is set to 1 to indicate that the register at 34h provides an
offset into the function's PCI Configuration Space containing a
pointer to the location of the first item in the list.
Interrupt Status:
This bit reflects the state of the interrupt in the device. Only
when the Interrupt Disable bit in the command register is a 0 and
this Interrupt Status bit is a 1, will the devices INTx# signal be
asserted. Setting the Interrupt Disable bit to a 1 has no effect on
the state of this bit.
This bit is set by Hardware and Software must write a 1 to clear
it.
Reserved
Internal Graphics Device 2 Configuration Register (D2:F0-F1)
0/2/0/PCI
8h
00h
RO
8 bits
Description
Description
Datasheet
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