QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 225
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 225 of 482
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PCI Express Graphics Device 1 Configuration Registers (D1:F0)
7
Warning:
7.1
Table 10.
Datasheet
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Class Code
Cache Line Size
Header Type
Primary Bus Number
Secondary Bus Number
Subordinate Bus Number
Register Name
PCI Express Graphics Device 1
Configuration Registers (D1:F0)
Device 1 contains the controls associated with the x16 root port that is the intended
attach point for external graphics. It is typically referred to as PEG (PCI Express
Graphics) port. It also functions as the virtual PCI-to-PCI bridge that was previously
associated with AGP.
When reading the PCI Express “conceptual” registers such as this, you may not get a
valid value unless the register value is stable.
The PCI Express* Base Specification defines two types of reserved bits:
Unless explicitly documented as Reserved and 0, all bits marked as Reserved are part
of the Reserved and Preserved type which has historically been the typical definition for
Reserved.
Most (if not all) control bits in this device cannot be modified unless the link is down.
Software is required to first disable the link, then program the registers, then re-enable
the link (which will cause a full-retrain with the new settings).
PEG Device 1 Function 0 Configuration Register
Summary
PEG Device 1 Function 0 Configuration Register Summary (Sheet 1 of 3)
• Reserved and Preserved: Reserved for future RW implementations; software must
• Reserved and 0: Reserved for future R/WC/S implementations; software must use
preserve value read for writes to bits.
0 for writes to bits.
CL1
SBUSN1
SUBUSN1
VID1
DID1
PCICMD1
PCISTS1
RID1
CC1
HDR1
PBUSN1
Register
Symbol
19
1A
0
2
4
6
8
9
C
E
18
Register
Start
1
3
5
7
8
B
C
E
18
19
1A
Register
End
8086h
27A1h
27ADh
0000h
0010h
00h
060400h
00h
01h
00h
00h
00h
Default
Value
1
2
R/W
RO
RO
R/W; RO
R/WC; RO
RO
RO
R/W
RO
RO
R/W
Access
225
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