QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 84

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

5.1.5
84
RID - Revision Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number of the (G)MCH Device 0.
6:5
4:4
3:0
7:0
Bit
Bit
Access
Access
RO
RO
RO
RO
Default
Default
Value
Value
00b
02h
0h
1b
Reserved
Capability List (CLIST):
This bit is hardwired to 1 to indicate to the configuration
software that this device/function implements a list of new
capabilities. A list of new capabilities is accessed via register
CAPPTR at configuration address offset 34h. Register CAPPTR
contains an offset pointing to the start address within
configuration space of this device where the AGP Capability
standard register resides.
Reserved
Revision Identification Number (RID):
This is an 8-bit value that indicates the revision identification
number for the MCH Device 0. For the A-0 Stepping, this value
is 00h.
0/0/0/PCI
08h
00h
RO
8 bits
(Sheet 2 of 2)
Host Bridge Device 0 - Configuration Registers (D0:F0)
Description
Description
Datasheet