QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 324

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

9.1.4
Table 16.
9.1.5
Table 17.
9.1.6
324
Extended System BIOS Area (E_0000h-E_FFFFh)
This 64-KB area (000E_0000h – 000E_FFFFh) is divided into four, 16-KB segments.
Each segment can be assigned independent read and write attributes so it can be
mapped either to main DRAM or to DMI. Typically, this area is used for RAM or ROM.
Memory segments that are disabled are not remapped elsewhere.
Non-snooped accesses from PCI Express or DMI to this region are always sent to
DRAM.
Extended System BIOS Area Memory Segments
System BIOS Area (F_0000h-F_FFFFh)
This area is a single, 64-KB segment (000F_0000h – 000F_FFFFh). This segment can
be assigned read and write attributes. It is by default (after reset) Read/Write disabled
and cycles are forwarded to DMI. By manipulating the Read/Write attributes, the
(G)MCH can “shadow” BIOS into the main DRAM. When disabled, this segment is not
remapped.
Non-snooped accesses from PCI Express or DMI to this region are always sent to
DRAM.
System BIOS Area Memory Segments
Programmable Attribute Map (PAM) Memory Area Details
The 13 sections from 768 KB to 1 MB comprise what is also known as the PAM Memory
Area.
The (G)MCH does not handle IWB (Implicit Write-Back) cycles targeting DMI. Since all
memory residing on DMI should be set as non-cacheable, there normally will not be
IWB cycles targeting DMI.
However, DMI becomes the default target for CPU and DMI originated accesses to
disabled segments of the PAM region. If the MTRRs covering the PAM regions are set to
WB or RC it is possible to get IWB cycles targeting DMI. This may occur for DMI
originated cycles to disabled PAM regions.
For example, say that a particular PAM region is set for “Read Disabled” and the MTRR
associated with this region is set to WB. A DMI master generates a memory read
targeting the PAM region. A snoop is generated on the FSB and the result is an IWB.
Since the PAM region is “Read Disabled” the default target for the Memory Read
becomes DMI. The IWB associated with this cycle will cause the (G)MCH to hang.
Memory Segments
Memory Segments
0E8000H - 0EBFFFH
0E0000H - 0E3FFFH
0E4000H - 0E7FFFH
0EC000H - 0EFFFFH
0F0000H - 0FFFFFH
Attributes
Attributes
WE
W/R
W/R
W/R
W/R
RE
BIOS Extension
BIOS Extension
BIOS Extension
BIOS Extension
Comments
Comments
BIOS Area
System Address Map
Datasheet