QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 294

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

8.1.32
294
PMCS - Power Management Control/Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
14:13
12:9
7:2
1:0
Bit
15
8
Access
R/W
RO
RO
RO
RO
RO
Default
Value
00b
00h
00b
0b
0h
0b
PME_Status:
This bit is 0 to indicate that IGD does not support PME#
generation from D3 (cold).
Reserved
Reserved
PME_En:
This bit is 0 to indicate that PME# assertion from D3 (cold) is
disabled.
Reserved
PowerState:
This field indicates the current power state of the IGD and can be
used to set the IGD into a new power state. If software attempts
to write an unsupported state to this field, write operation must
complete normally on the bus, but the data is discarded and no
state change occurs.
On a transition from D3 to D0 the graphics controller is optionally
reset to initial values. Behavior of the graphics controller in
supported states is detailed in the power management section of
the graphics controller specification.
Bits[1:0]Power state
00 D0Default
01 D1Not Supported
10 D2Not Supported
11 D3
Internal Graphics Device 2 Configuration Register (D2:F0-F1)
0/2/0/PCI
D4-D5h
0000h
R/W; RO
16 bits
Description
Datasheet