QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 178

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

6.4.10
178
IUB - In Use Bits
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Semaphore bits available for software.
31:25
24:24
23:17
16:16
15:9
Bit
Access
RS/WC
RS/WC
RO
RO
RO
Default
Value
00h
00h
00h
0b
0b
0/0/0/MCHBAR
CD0-CD3h
00000000h
RO; RS/WC;
32 bits
Reserved:
Must remain hardwired to all 0’s to avoid potential
resource lockout.
In Use Bit 3 (IU3):
Software semaphore bit. After a full (G)MCH RESET, a
read to this bit returns a 0. After the first read,
subsequent reads will return a 1. A write of a 1 to this
bit will reset the next read value to 0.
Software can poll this bit until it reads a 0, and will then
own the usage of the resource with which software
associates it.
Writing a 0 to this bit has no effect.
Reserved:
Must remain hardwired to all 0’s to avoid potential
resource lockout.
In Use Bit 2 (IU2):
Software semaphore bit. After a full (G)MCH RESET, a
read to this bit returns a 0. After the first read,
subsequent reads will return a 1. A write of a 1 to this
bit will reset the next read value to 0.
Software can poll this bit until it reads a 0, and will then
own the usage of the resource with which software
associates it.
Writing a 0 to this bit has no effect.
Reserved:
Must remain hardwired to all 0’s to avoid potential
resource lockout.
Device 0 Memory Mapped I/O Register
Description
Datasheet