QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 175

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
Device 0 Memory Mapped I/O Register
6.4.7
Datasheet
TCOF1 – TCO Fuses 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register indicates the fuse settings for the TCO register. TCO has 7 bits, which are
set by fuses when trimmed.
7:7
6:0
Bit
Access
RS/WC
RO
Default
Value
N/A
0b
INUSE_STS:
Software semaphore bit. After a full (G)MCH RESET, a read to
this bit returns a 0. After the first read, subsequent reads will
return a 1. A write of a 1 to this bit will reset the next read
value to 0.
Software can poll this bit until it reads a 0, and will then own
the usage of the thermal sensor.
Writing a 0 to this bit has no effect.
TCO Fuses:
This 7-bit field gives the value of the trimming fuses for TCO.
The register always reports the settings of all 7 thermal fuses.
Note: While this is a 7-bit field, the 7th bit is sign extended to
9 bits for TCO operation.
R e g is t e r F ie ld V a lu e
0/0/0/MCHBAR
C96h
_0xxx__xxxx_h
RS/WC; RO
8 bits
0 0 h to 3 F h
4 1 h to 7 fh
Description
0 0 0 0 0 0 0 0 0 to 0 0 0 1 1 1 1 1 1
1 1 1 0 0 0 0 0 1 to 1 1 1 1 1 1 1 1 1
B in a r y V a lu e
175

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